Power-line Communications
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- V. Chawla, R. Thirugnanam, D.S. Ha, and T.M. Mak, "Design of a Data Recovery Block for Communications over Power Distribution Networks of Microprocessors,” International Conference on Circuits & Systems for Communications, 5 pages, May 2008.
- R. Thirugnanam, D.S. Ha, and T. M. Mak, "Data Recovery Block Design for Impulse Modulated Power Line Communications in a Microprocessor," IEEE Computer Society Annual Symposium on VLSI, pp. 153 - 158, May 2007.
- W.C. Chung, and D.S. Ha, “A New Approach for Massive Parallel Scan,” International Test Conference, Paper 21.3, pp. 1-10, November 2005.
- W.C. Chung, D.S. Ha, and H.-J. Lee, “Dual Use of Power Lines for Data Communications in System-On-Chips Environments,” International Symposium on Circuits and Systems, pp. 3355–3358, May 2005.
